1. Field of the Invention
The present invention relates generally to an AGC circuit used for a read channel in a disk storage apparatus and, more particularly, to an AGC circuit of a disk storage apparatus for controlling a level of a reading signal of a head to be kept constant.
2. Description of the Related Art
A magnetic disk apparatus is a storage apparatus for writing and reading the data to and from a magnetic disk by a magnetic head. This magnetic disk apparatus has a read channel for reading the data written to the magnetic disk. An AGC (Automatic Gain Control) circuit is provided for the purpose of uniformizing amplitudes of the data read out in the read channels.
That is, the surface of a storage medium appears to be seemingly flat. An actual signal, however, fluctuates in terms of output due to a minute medium defects and medium unevenness. Therefore, in the AGC circuit, after controlling the readout signal with a constant amplitude, signal processing for demodulation is executed.
On the other hand, the AGC circuit used in the read channel of a partial response system has a feedback loop with the digital data. Employed in this feedback loop are a current type digital-to-analog converter for converting a digital error signal into an analog control quantity, and a loop filter. This current type digital-to-analog converter is requested to set an analog control quantity so that an AGC adjustment area on the magnetic disk is minimized.
FIG. 23 is a diagram showing a construction of the prior art. FIG. 24 is an explanatory diagram showing the prior art.
FIG. 23 illustrates a digital AGC circuit used in the read channel of the partial response system. An analog signal read by a magnetic head (unillustrated) from a magnetic disk (unillustrated), is inputted to a gain control amplifier 90. The gain control amplifier (GCA) 90 amplifies an input signal with a gain corresponding to a control voltage.
An output of this gain control amplifier 90 is inputted to an analog filter 91. The analog filter 91 is a PR-4 (Partial Response class 4) filter. An output of the analog filter 91 is inputted to an A/D (analog-to-digital) converter 92. The A/D converter 92 converts the output of the analog filter 91 into a digital value by sampling it in accordance with a VFO clock defined as a clock of a voltage control oscillator. This digital value is an output of the digital AGC circuit.
The thus converted digital value is inputted to a gain correction circuit 93. The gain correction circuit 93 calculates an error between a target amplitude value and the thus inputted digital value. This error signal is inputted to a current type D/A (digital-to-analog) converter 94. The current type D/A converter 94 converts the digital error signal into an analog current quantity. This analog current is inputted to a loop filter 95 consisting of a condenser. The loop filter 95 converts the analog current into a control voltage. Then, the loop filter 95 supplies a gain control amplifier 90 with this control voltage.
An operation of the AGC circuit having the above-mentioned digital feedback will be explained referring to FIG. 24. As shown in FIG. 24, the error signal is updated at an interval of a sampling period of the A/D converter 92, and hence an error current is also updated at the interval of the sampling period of the A/D converter 92.
The condenser of the loop filter 95 is charged with the error current, thereby generating the control voltage. The AGC control voltage is therefore also updated at the interval of the sampling period of the A/D converter 92.
Herein, the control voltage V.sub.n of present sample time is expressed by the following formula: EQU V.sub.n =(T/C) x Vn+V.sub.n-1
where T is the sampling period of the A/D converter 92, C is the constant of the condenser of the loop filter 95, Vn is the current value of the error quantity, and V.sub.n-1 is the control voltage one sample before.
FIG. 25 is an explanatory diagram showing a track format in the prior art.
The track format on the magnetic disk medium has, as illustrated in FIG. 25, a servo area and a read/write area. A "GAP" is provided in front of the data area in the read/write area. Data of a single period is written to the GAP. AGC control operates when in a GAP reading process. Then, it is required that an AGC gain be adjusted to an optimum value before reading the data from the data area. The AGC gain is adjusted in this GAP area. With this adjustment, a clock (VFC) clock) of a voltage frequency oscillator is synchronized, thus adjusting a phase of a read clock.
Accordingly, the GAP length is set corresponding to a time length for which the AGC gain can be adjusted. As this GAP length becomes smaller, a wider data area can be provided, resulting in an increase in storage capacity.
According to the prior art, the maximum current value of the above-described current type D/A converter 94 and the constant of the condenser of the loop filter 95, are set to minimize the GAP length.
For example, if the GAP length required for optimally adjusting the gain when a variation quantity of the control voltage at the interval of the period T is small, the maximum current value of the current type D/A converter 94 is increased, or alternatively the constant of the condenser is decreased. Reversely if an overshoot occurs when the variation quantity of the control voltage at the interval of the period T is large, the maximum current value of the current type D/A converter 94 is decreased, or alternatively the constant of the condenser is increased.
Further, as shown in FIG. 25, the data is written to the servo area when delivered from the factory. The servo area is distinguished from the read/write area by a servo gate signal *SVGT.
FIG. 26 is an explanatory diagram of a zone bit record, for explaining the problems inherent in the prior art. FIG. 27 is an explanatory diagram of a conventional AGC operation, for explaining the problems peculiar to the prior art.
The following problems, however, arise in the prior art. First, as shown in FIG. 26, a zone bit recording method is known. According to this zone bit recording method, the magnetic disk is segmented into concentric zones. Then, a transfer rate (a write frequency) is set higher as the zone is disposed more outward. With this arrangement, bit densities are equalized in the respective zones. Consequently, a recording density is enhanced.
When the prior art AGC gain adjusting method is applied to this zone bit recording method, the following problems might arise. According to the zone bit recording method, the period T differs depending on the respective zones. Accordingly, when the period T is decreased, the time for charging the condenser with the current is reduced. The variation quantity of the control voltage at the interval of the period T is thereby decreased. Reversely when the period T elongates, the time for charging the condenser with the current increases. This augments the variation quantity of the control voltage at the interval of the period T.
Consequently, one problem is that the GAP length can not be minimized in another zone even by adjusting the AGC maximum current value to minimize the GAP length in a certain zone. This leads to another problem, wherein a rise in storage efficiency by the zone bit recording method is hindered.
Second, in the zone bit recording method, the transfer rate in the servo area is fixed in each zone. This is because it is difficult to perform positioning at each zone boundary if the transfer rate in the servo area is changed in the respective zones.
Therefore, the transfer rate in the read/write area is different from that in the servo area according to the zone bit recording method. Namely, it follows that the period T differs. This reduces to such a problem that the time needed for optimally adjusting the AGC gain in the servo area is not minimized even when the AGC maximum current value is adjusted to minimize the GAP length in the read/write area as described above. Hence, there exists a problem of hindering the rise in the storage efficiency of the zone bit recording method.
Third, as shown in FIG. 27, let S2 be the signal having a target amplitude, and a 2-fold amplitude signal becomes S1, and a 1/2-fold amplitude signal is S3. For example, when switched over to a head having a 2-fold output level, and when changed from the target amplitude signal S2 to the signal S1, a difference from the target value is "16". While on the other hand, when switched over to a head having a one-half output Level, and when changed from the target amplitude signal S2 to the signal S3, the difference from the target value is "8".
Therefore, the difference is smaller when increasing the gain as in the case of becoming the signal S3 than when decreasing the gain as in the case of becoming the signal S1. Hence, the problem is that the operation becomes slower when increasing the gain than when decreasing the gain. This results in such a problem that the rise in the storage efficiency is hindered because of the longer time needed for optimally adjusting the AGC gain.